# Q&A

**URL:** https://community.opal-rt.com/c/discussions/13.md?page=1

[Latest](https://community.opal-rt.com/latest.md) · [Categories](https://community.opal-rt.com/categories.md) · [Tags](https://community.opal-rt.com/tags.md)

**Page:** 2

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## [FAA Inset Light Material Requirements](https://community.opal-rt.com/t/faa-inset-light-material-requirements/245)

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**Author:** [@Avish\_94a](https://community.opal-rt.com/u/Avish_94a)\
**Replies:** 0\
**Last updated:** [September 30, 2026, 12:43pm UTC](https://community.opal-rt.com/t/faa-inset-light-material-requirements/245 "2026-09-30T12:43:00Z")

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Material and construction of the 8-inch inset light shall comply with applicable FAA AC 150/5345-46F requirements. The housing, top cover, optical assembly, seals, fasteners and internal components shall have adequate me…

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## [Flywheel incorporation with Centrifugal Break](https://community.opal-rt.com/t/flywheel-incorporation-with-centrifugal-break/213)

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**Author:** [@research\_123](https://community.opal-rt.com/u/research_123)\
**Replies:** 1\
**Last updated:** [September 23, 2026, 7:25pm UTC](https://community.opal-rt.com/t/flywheel-incorporation-with-centrifugal-break/213 "2026-09-23T19:25:37Z")

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For emergency escape device, I want to incorporate flywheel with centrifugal break. I want concept and tips for designing.

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## [HYPERSIM model - distance protection](https://community.opal-rt.com/t/hypersim-model-distance-protection/203)

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**Author:** [@IB\_1309](https://community.opal-rt.com/u/IB_1309)\
**Replies:** 3\
**Last updated:** [September 23, 2026, 7:10pm UTC](https://community.opal-rt.com/t/hypersim-model-distance-protection/203 "2026-09-23T19:10:13Z")

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I want to test distance protection on a transmission line. I have set up a 110 kV network equivalent (source) at both ends, but I suspect there is an issue with the parameters of that 110 kV source. Does anyone know how …

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## [Where can I see the webinar archive of Hardware-in-the-Loop Validation for Data Center Power Infrastructure](https://community.opal-rt.com/t/where-can-i-see-the-webinar-archive-of-hardware-in-the-loop-validation-for-data-center-power-infrastructure/197)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [September 21, 2026, 5:06am UTC](https://community.opal-rt.com/t/where-can-i-see-the-webinar-archive-of-hardware-in-the-loop-validation-for-data-center-power-infrastructure/197 "2026-09-21T05:06:32Z")

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Where can I see the webinar archive? September 10 2026 Webinar:“Hardware-in-the-Loop Validation for Data Center Power Infrastructure”

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## [Why halfline is required for FPGA and CPU cosimulation](https://community.opal-rt.com/t/why-halfline-is-required-for-fpga-and-cpu-cosimulation/193)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [September 21, 2026, 4:58am UTC](https://community.opal-rt.com/t/why-halfline-is-required-for-fpga-and-cpu-cosimulation/193 "2026-09-21T04:58:53Z")

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I am doing FPGA and CPU co-simulation in Hypersim. I do not know why halfline is required for FPGA and CPU co-simulation?

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## [How can I increase the time step to 50us](https://community.opal-rt.com/t/how-can-i-increase-the-time-step-to-50us/194)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [September 21, 2026, 4:31am UTC](https://community.opal-rt.com/t/how-can-i-increase-the-time-step-to-50us/194 "2026-09-21T04:31:18Z")

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I am doing the simulaiton AC/DC and using PWM generator the switching frequency is 10kHz. If I set the time step at 50us, the simulated waveforms will be messy. So I need to decrease the time step to 1us, and the wavef…

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## [Industrial instrumentation](https://community.opal-rt.com/t/industrial-instrumentation/208)

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**Author:** [@CheeryWillow75](https://community.opal-rt.com/u/CheeryWillow75)\
**Replies:** 0\
**Last updated:** [September 19, 2026, 2:23pm UTC](https://community.opal-rt.com/t/industrial-instrumentation/208 "2026-09-19T14:23:51Z")

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for interview basic industrial instrumentation

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## [How to prepare for Technical Head interview in an FMCG. What is the smartest way to crack?](https://community.opal-rt.com/t/how-to-prepare-for-technical-head-interview-in-an-fmcg-what-is-the-smartest-way-to-crack/205)

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**Author:** [@Deepankar](https://community.opal-rt.com/u/Deepankar)\
**Replies:** 0\
**Last updated:** [September 19, 2026, 2:18pm UTC](https://community.opal-rt.com/t/how-to-prepare-for-technical-head-interview-in-an-fmcg-what-is-the-smartest-way-to-crack/205 "2026-09-19T14:18:36Z")

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I have an interview with a top tier FMCG ( MNC) for Technical manager. Can you suggest the smartest ways to prepare and crack the interview.

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## [Verbose mode decrease real-time performance](https://community.opal-rt.com/t/verbose-mode-decrease-real-time-performance/198)

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**Author:** [@RAVITEJA](https://community.opal-rt.com/u/RAVITEJA)\
**Replies:** 3\
**Last updated:** [September 17, 2026, 5:18am UTC](https://community.opal-rt.com/t/verbose-mode-decrease-real-time-performance/198 "2026-09-17T05:18:39Z")

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Hi Team, Every time,I run the simulation ,I see a warning message saying “verbose mesage decreases real-time performance!” I tried cleaning the code directory. still i see this issue. is there a permanent solution fo…

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## [How Should Previous Releases of RT-Lab Be Shared With Customers](https://community.opal-rt.com/t/how-should-previous-releases-of-rt-lab-be-shared-with-customers/142)

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**Author:** [@Yuheng](https://community.opal-rt.com/u/Yuheng)\
**Replies:** 2\
**Last updated:** [September 16, 2026, 8:54pm UTC](https://community.opal-rt.com/t/how-should-previous-releases-of-rt-lab-be-shared-with-customers/142 "2026-09-16T20:54:06Z")

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Hi all, I’m an Opal-RT FAE, and I’d like to start a discussion: Should we utilise this platform to share software resources with customers? Background We regularly receive customer requests for legacy RT-Lab versions t…

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## [01\_axial\_pm\_generator\_v3\_corrected\_EN](https://community.opal-rt.com/t/01-axial-pm-generator-v3-corrected-en/199)

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**Author:** [@SilverPanda86](https://community.opal-rt.com/u/SilverPanda86)\
**Replies:** 0\
**Last updated:** [September 15, 2026, 10:31pm UTC](https://community.opal-rt.com/t/01-axial-pm-generator-v3-corrected-en/199 "2026-09-15T22:31:19Z")

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Would anyone like to verify the functionality of the energy source design in practice? Concept:

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## [Is eHs working in VC707 FPGA?](https://community.opal-rt.com/t/is-ehs-working-in-vc707-fpga/161)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [September 9, 2026, 1:49am UTC](https://community.opal-rt.com/t/is-ehs-working-in-vc707-fpga/161 "2026-09-09T01:49:05Z")

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Below is the OP5707XG system structure. I am using eHs, which is based on FPGA. There is a VC707 FPGA in the OP5707XG system structure. Is ht eHs working in VC707 as shown in the OP5707XG system structure?

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## [Can OP8110 Amplifier operate at "Current Source" mode?](https://community.opal-rt.com/t/can-op8110-amplifier-operate-at-current-source-mode/191)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [September 9, 2026, 1:48am UTC](https://community.opal-rt.com/t/can-op8110-amplifier-operate-at-current-source-mode/191 "2026-09-09T01:48:00Z")

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I am using the OPAL-RT platform to do inverter testing now. I connected a PV inverter (GFL) with OP8110 of the OPAL-RT platform. OP8110 (Power Amplifer )is operated in Voltage Source mode. If I want to connect GFM inv…

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## [About Hypersim WT example](https://community.opal-rt.com/t/about-hypersim-wt-example/190)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [September 9, 2026, 1:44am UTC](https://community.opal-rt.com/t/about-hypersim-wt-example/190 "2026-09-09T01:44:50Z")

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I updated Hypersim to 2026.3, and I saw the WT components with GFM control in the smart inverter library. Are there any exmples of using WT components? And Will the Grid Forming Pv inverter have the components as well? …

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## [Step time too small when connected to OP5707XG](https://community.opal-rt.com/t/step-time-too-small-when-connected-to-op5707xg/183)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 3\
**Last updated:** [September 9, 2026, 1:43am UTC](https://community.opal-rt.com/t/step-time-too-small-when-connected-to-op5707xg/183 "2026-09-09T01:43:56Z")

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I ran the microgrid simulation in hypersim and connected it to OP5707XG. It showed the following message. I do not know the reason.

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## [2-Winding 3-Phase Saturable Transformer with Tap Changer V1\_ V\_2](https://community.opal-rt.com/t/2-winding-3-phase-saturable-transformer-with-tap-changer-v1-v-2/173)

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**Author:** [@cokeke](https://community.opal-rt.com/u/cokeke)\
**Replies:** 1\
**Last updated:** [September 8, 2026, 3:50pm UTC](https://community.opal-rt.com/t/2-winding-3-phase-saturable-transformer-with-tap-changer-v1-v-2/173 "2026-09-08T15:50:38Z")

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I exchanged the transformer in Example Model for 87T Transformer Differential Protection Relay for a 2-Winding 3-Phase Saturable Transformer with Tap Changer When I open the Sensor form for the 2-Winding 3-Phase Satu…

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## [IEC 61850 Substation Automation System (SAS) example based on IOP 2019 (IEC61850\_SAS.ecf) HYPERSIM version 2022.1](https://community.opal-rt.com/t/iec-61850-substation-automation-system-sas-example-based-on-iop-2019-iec61850-sas-ecf-hypersim-version-2022-1/148)

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**Author:** [@cokeke](https://community.opal-rt.com/u/cokeke)\
**Replies:** 7\
**Last updated:** [September 8, 2026, 3:38pm UTC](https://community.opal-rt.com/t/iec-61850-substation-automation-system-sas-example-based-on-iop-2019-iec61850-sas-ecf-hypersim-version-2022-1/148 "2026-09-08T15:38:45Z")

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Hello, My HYPERSIM version is 2022.1 How do i run this model (IEC61850\_SAS.ecf) to achieve the helpfile’s outcomes? Do I need the Hardware Simulator (OP5650XG in my case) to run this model or can it be run using only …

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## [RTE PWM connect to MOSFET](https://community.opal-rt.com/t/rte-pwm-connect-to-mosfet/189)

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**Author:** [@Hello](https://community.opal-rt.com/u/Hello)\
**Replies:** 1\
**Last updated:** [September 8, 2026, 3:09pm UTC](https://community.opal-rt.com/t/rte-pwm-connect-to-mosfet/189 "2026-09-08T15:09:42Z")

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I want to generate a 100kHz pulse train that will fed to MOSFET. As i am new to this will anyone suggest me for this

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## [HYPERSIM: Surge Arrester Block and Custom Library Creation](https://community.opal-rt.com/t/hypersim-surge-arrester-block-and-custom-library-creation/185)

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**Author:** [@RAVITEJA](https://community.opal-rt.com/u/RAVITEJA)\
**Replies:** 2\
**Last updated:** [September 4, 2026, 2:44pm UTC](https://community.opal-rt.com/t/hypersim-surge-arrester-block-and-custom-library-creation/185 "2026-09-04T14:44:17Z")

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Hi Team, I have a couple of questions regarding HYPERSIM: 1.I am looking for a Surge Arrester / Lightning Arrester block in HYPERSIM. Do we have a ready-to-use block available in the HYPERSIM library? I came across a S…

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## [Simulating RTDS for station models using RTLAB](https://community.opal-rt.com/t/rtlab-rtds/174)

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**Author:** [@zhang](https://community.opal-rt.com/u/zhang)\
**Replies:** 1\
**Last updated:** [August 31, 2026, 5:52pm UTC](https://community.opal-rt.com/t/rtlab-rtds/174 "2026-08-31T17:52:56Z")

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I am currently simulating an RTDS inverter model and want to add a cable module in RT-LAB. However, during debugging, I found that the model diverges after adding the cable capacitance. The cable parameters are kept consistent with those in the RTDS, as shown below:

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## [How to change circuit parameters during simulation ⚙️](https://community.opal-rt.com/t/how-to-change-circuit-parameters-during-simulation/52)

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**Author:** [@LeylaErdan](https://community.opal-rt.com/u/LeylaErdan)\
**Replies:** 5\
**Last updated:** [August 28, 2026, 1:57am UTC](https://community.opal-rt.com/t/how-to-change-circuit-parameters-during-simulation/52 "2026-08-28T01:57:50Z")

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A common question when running models in SPS Software is whether it is possible to tune parameters on the fly without stopping the simulation. Here is how SPS Software handles parameter changes and how you can automate …

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## [Using Agentic AI to do simulation](https://community.opal-rt.com/t/using-agentic-ai-to-do-simulation/176)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 1\
**Last updated:** [August 28, 2026, 1:30am UTC](https://community.opal-rt.com/t/using-agentic-ai-to-do-simulation/176 "2026-08-28T01:30:13Z")

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Is it possible for Agentic AI to do OPAL-RT simulation?

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## [SPS Software vs. Simscape Electrical: Choosing the Right Tool for Electrical System Simulation](https://community.opal-rt.com/t/sps-software-vs-simscape-electrical-choosing-the-right-tool-for-electrical-system-simulation/172)

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**Author:** [@Mo.mansour](https://community.opal-rt.com/u/Mo.mansour)\
**Replies:** 0\
**Last updated:** [August 20, 2026, 8:26pm UTC](https://community.opal-rt.com/t/sps-software-vs-simscape-electrical-choosing-the-right-tool-for-electrical-system-simulation/172 "2026-08-20T20:26:19Z")

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The evolution of electrical systems is driving increased demand for simulation tools that can accurately model complex networks while maintaining practical performance and scalability. As engineers work on renewable ener…

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## [SPS: From Building Models to Real-Time Validation](https://community.opal-rt.com/t/sps-from-building-models-to-real-time-validation/171)

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**Author:** [@Mo.mansour](https://community.opal-rt.com/u/Mo.mansour)\
**Replies:** 0\
**Last updated:** [August 19, 2026, 8:02pm UTC](https://community.opal-rt.com/t/sps-from-building-models-to-real-time-validation/171 "2026-08-19T20:02:22Z")

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One of the strengths of SPS Software is that it supports engineers throughout the entire development cycle, from modeling and simulation to real-time and Hardware-in-the-Loop (HIL) testing. It starts with electrical mod…

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## [CIGRE Interface application](https://community.opal-rt.com/t/cigre-interface-application/168)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [August 19, 2026, 7:41am UTC](https://community.opal-rt.com/t/cigre-interface-application/168 "2026-08-19T07:41:52Z")

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Does anyone know how to use CIGRE interface. I saw the CIGRE interface in hypersim

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## [How can I connect an AI server and OPAL-RT](https://community.opal-rt.com/t/how-can-i-connect-ai-server-and-opal-rt/162)

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**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 4\
**Last updated:** [August 18, 2026, 7:09pm UTC](https://community.opal-rt.com/t/how-can-i-connect-ai-server-and-opal-rt/162 "2026-08-18T19:09:50Z")

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Does anyone know how to connect an AI server and OPAL-RT? The AI server can be modeled as an AI server, and the workload profile can be transferred to OPAL-RT.

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## [Loopback test with OP4610XG analog I/O in HYPERSIM 2026.1.02](https://community.opal-rt.com/t/loopback-test-with-op4610xg-analog-i-o-in-hypersim-2026-1-02/163)

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**Author:** [@Liliana2898](https://community.opal-rt.com/u/Liliana2898)\
**Replies:** 3\
**Last updated:** [August 18, 2026, 7:00pm UTC](https://community.opal-rt.com/t/loopback-test-with-op4610xg-analog-i-o-in-hypersim-2026-1-02/163 "2026-08-18T19:00:55Z")

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Good morning, I would appreciate your help with a loopback test using the analog inputs and outputs of an OPAL-RT OP4610XG. I have an OP4610XG module and the loopback cable included with the starter kit. I am using HYP…

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## [Measuring Difference Between Two Simulated Signals in Hypersim](https://community.opal-rt.com/t/measuring-difference-between-two-simulated-signals-in-hypersim/156)

<div class="topic-metadata">

**Author:** [@RAVITEJA](https://community.opal-rt.com/u/RAVITEJA)\
**Replies:** 1\
**Last updated:** [August 18, 2026, 6:00pm UTC](https://community.opal-rt.com/t/measuring-difference-between-two-simulated-signals-in-hypersim/156 "2026-08-18T18:00:45Z")

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Hi Team, I would like to know if there is any built-in feature in Hypersim to directly measure the difference between two simulated signals. For my application, I have two signals: PT\_Souce\_A CVT\_Out\_A I would like …

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## [Combing GFL and GFM Inverters into one Inverter using smart inverter library](https://community.opal-rt.com/t/combing-gfl-and-gfm-inverters-into-one-inverter-using-smart-inverter-library/154)

<div class="topic-metadata">

**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 5\
**Last updated:** [August 17, 2026, 8:42am UTC](https://community.opal-rt.com/t/combing-gfl-and-gfm-inverters-into-one-inverter-using-smart-inverter-library/154 "2026-08-17T08:42:40Z")

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I am using hypersim to model GFL and GFM using smart inverter library. But I want to combine them into one inverter with GFL and GFM control. How can I do?

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## [Question about progressive selector](https://community.opal-rt.com/t/question-about-progressive-selector/166)

<div class="topic-metadata">

**Author:** [@Vincent\_Jiang](https://community.opal-rt.com/u/Vincent_Jiang)\
**Replies:** 2\
**Last updated:** [August 17, 2026, 8:26am UTC](https://community.opal-rt.com/t/question-about-progressive-selector/166 "2026-08-17T08:26:34Z")

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I am not familar with the progressive selector. Why are there two outputs? y=u1gain+u2(1-gain) Based on the above equation, how can I determine the gain? (“gain” is the output) Thank you

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