Loopback test with OP4610XG analog I/O in HYPERSIM 2026.1.02

Good morning,

I would appreciate your help with a loopback test using the analog inputs and outputs of an OPAL-RT OP4610XG.

I have an OP4610XG module and the loopback cable included with the starter kit. I am using HYPERSIM 2026.1.02.

Below is a screenshot of my HYPERSIM model:

I am also attaching a picture showing the physical connection to the OP4610XG and the system diagram:


I/O configuration

My current configuration is:

Ain1 → AOUT_LAB / Slot 2A / Analog In / Channel 0
Aout1 → AOUT_LAB / Slot 2B / Analog Out / Channel 0
Sine1 → input signal used to drive Aout1

The objective is to generate a sinusoidal signal, send it through the analog output, physically loop it back to the analog input using the loopback cable, and observe the same signal at Ain1.

The resulting waveform is shown below:

However, I am not obtaining the expected signal at the analog input.

For the bitstream, I used one of the bitstreams available in the repository. According to its documentation/configuration, Slot 2A corresponds to Analog Input and Slot 2B corresponds to Analog Output.

Could someone please help me identify what might be incorrectly configured?

In particular, I would appreciate any guidance regarding:

The physical loopback cable connection between the analog output and analog input.
The correct HYPERSIM I/O blocks and configuration for the OP4610XG.
Whether Slot 2A and Slot 2B are correctly configured for this test.
Whether any additional configuration is required in the bitstream or HYPERSIM before the analog input can be monitored.

Thank you in advance for your help.

Recommended Steps
Confirm your bitstream — In HYPERSIM, use Target Diagnostic in the Target Manager to verify which bitstream is loaded and whether it includes both AI (Slot 2A) and AO (Slot 2B).

Correct the I/O block assignments — In the HYPERSIM I/O Interface, ensure Ain1 references the Analog Input controller/port and Aout1 references the Analog Output controller/port. They should not both point to the same “AOUT_LAB” controller.

Physical cable — Connect the DB-37 loopback cable from the first P1 connector of Slot 2B (AO) to the first P1 connector of Slot 2A (AI).

@PFA007 Hello, good morning. Thank you very much for your response.

In my case, I have three bitstreams available under Standard Repositories, as shown in the image below:

Which of these bitstreams would be the appropriate one to use with an OP4610XG?

Additionally, I would like to perform a simple test by sending a sine wave signal from the model to one of the OP4610XG analog outputs, so that I can visualize the signal using an oscilloscope.

Can I use the same bitstream for this test, or is a different/specific bitstream required for the analog outputs?

Thank you very much for your help.

Hello!
Here is some suggestion from my end to try.

Which bitstream to select for the OP4610XG:
From the three bitstreams shown in your Standard Repositories screenshot, look at the naming convention of each one. The bitstream appropriate for your OP4610XG should explicitly reference support for both Analog Input (AI) and Analog Output (AO) in its name or description. If the names are not immediately clear, you can hover over or select each one to view its channel configuration details before loading it.

To confirm you have the right one loaded:

In HYPERSIM, open the Target Manager

Run Target Diagnostic on your OP4610XG target

Check that the diagnostic output lists both AI channels (Slot 2A) and AO channels (Slot 2B) as active — this confirms the bitstream supports both directions

Can you use the same bitstream for the oscilloscope test?

Yes — as long as the bitstream supports analog outputs, you can use it for both the loopback test and the oscilloscope test. No separate bitstream is needed. Simply connect your oscilloscope probe to the appropriate pin on the Slot 2B DB-37 connector and you should be able to observe the sine wave directly.

One thing to double-check before running either test:

As mentioned in the previous reply, make sure your I/O block assignments in HYPERSIM are pointing to two separate controllers:

Ain1 → Analog Input controller (Slot 2A)

Aout1 → Analog Output controller (Slot 2B)

If both are still assigned to the same controller, the signal will not route correctly regardless of which bitstream is loaded.